433 search results - page 56 / 87 » Activity-driven clock design for low power circuits |
161
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DAC
2006
ACM
16 years 2 months ago
2006
ACM
This paper presents analysis methods for energy estimation in RC trees driven by time-varying voltage sources, e.g., buffers, timevarying power supplies, and resonant clock genera...
127
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ISLPED
2003
ACM
15 years 7 months ago
2003
ACM
We introduce and analyze the ground bounce due to power mode transition in power gating structures. To reduce the ground bounce, we propose novel power gating structures in which ...
112
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GLVLSI
1998
IEEE
15 years 6 months ago
1998
IEEE
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
107
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ASAP
2008
IEEE
15 years 8 months ago
2008
IEEE
NTRU is a public-key cryptosystem based on the shortest vector problem in a lattice which is an alternative to RSA and ECC. This work presents a compact and low power NTRU design ...
DATE
2008
IEEE
15 years 8 months ago
2008
IEEE
The prospective use of upcoming nanometer CMOS technology nodes (65nm, 45nm, and beyond) in bioelectronic interfaces is raising a number of important issues concerning circuit arc...