433 search results - page 59 / 87 » Activity-driven clock design for low power circuits |
107
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ICCD
2008
IEEE
15 years 11 months ago
2008
IEEE
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
112
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GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
GLVLSI
2006
IEEE
15 years 8 months ago
2006
IEEE
Two generations of a wideband low noise amplifier (LNA) employing noise canceling principle have been synthesized. The first generation design was fabricated in a 0.35 µm SiGe Bi...
VLSI
2010
Springer
15 years 8 days ago
2010
Springer
—Latency insensitivity is a promising design paradigm in the nanometer era since it has potential benefits of increased modularity and robustness to variations. Synchronous elas...
128
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CASES
2006
ACM
15 years 8 months ago
2006
ACM
Rising interest in the applications of wireless sensor networks has spurred research in the development of computing systems for lowthroughput, energy-constrained applications. Un...