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» Activity-driven clock design for low power circuits
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ISLPED
2007
ACM
57views Hardware» more  ISLPED 2007»
15 years 3 months ago
Resource area dilation to reduce power density in throughput servers
Throughput servers using simultaneous multithreaded (SMT) processors are becoming an important paradigm with products such as Sun's Niagara and IBM Power5. Unfortunately, thr...
Michael D. Powell, T. N. Vijaykumar
VLSISP
2010
140views more  VLSISP 2010»
15 years 8 days ago
A Split-Decoding Message Passing Algorithm for Low Density Parity Check Decoders
A Split decoding algorithm is proposed which divides each row of the parity check matrix into two or multiple nearly-independent simplified partitions. The proposed method signific...
Tinoosh Mohsenin, Bevan M. Baas
DAC
2006
ACM
15 years 8 months ago
Circuits for energy harvesting sensor signal processing
duce system weight and volume, increase operating lifetime, The recent explosion in capability of embedded and portable decrease maintenance costs, and open new frontiers for inele...
Rajeevan Amirtharajah, Justin Wenck, Jamie Collier...
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 6 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
ASPDAC
2006
ACM
159views Hardware» more  ASPDAC 2006»
15 years 8 months ago
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology
: With technology scaling, elevated temperatures caused by increased power density create a critical bottleneck modulating the circuit operation. With the advent of FinFET technolo...
Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh...