Sciweavers

433 search results - page 74 / 87
» Activity-driven clock design for low power circuits
Sort
View
106
Voted
JCP
2008
141views more  JCP 2008»
15 years 1 months ago
Leakage Controlled Read Stable Static Random Access Memories
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...
Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, Law...
CLOUD
2010
ACM
15 years 7 months ago
Virtual machine power metering and provisioning
Virtualization is often used in cloud computing platforms for its several advantages in efficiently managing resources. However, virtualization raises certain additional challeng...
Aman Kansal, Feng Zhao, Jie Liu, Nupur Kothari, Ar...
120
Voted
TCAD
2010
97views more  TCAD 2010»
14 years 8 months ago
Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
JCSC
2002
129views more  JCSC 2002»
15 years 1 months ago
Leakage Current Reduction in VLSI Systems
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
David Blaauw, Steven M. Martin, Trevor N. Mudge, K...
CASES
2010
ACM
14 years 12 months ago
Implementing virtual secure circuit using a custom-instruction approach
Although cryptographic algorithms are designed to resist at least thousands of years of cryptoanalysis, implementing them with either software or hardware usually leaks additional...
Zhimin Chen, Ambuj Sinha, Patrick Schaumont