433 search results - page 75 / 87 » Activity-driven clock design for low power circuits |
ASPDAC
2004
ACM
15 years 7 months ago
2004
ACM
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...
108
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DSD
2007
IEEE
15 years 8 months ago
2007
IEEE
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
134
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VLSID
2007
IEEE
16 years 2 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
118
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CASES
2005
ACM
15 years 3 months ago
2005
ACM
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
116
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IWNAS
2008
IEEE
15 years 8 months ago
2008
IEEE
∗ As one type of stealthy and hard-to-detect attack, lowrate TCP-targeted DDoS attack can seriously throttle the throughput of normal TCP flows for a long time without being noti...