433 search results - page 77 / 87 » Activity-driven clock design for low power circuits |
141
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HPCA
2012
IEEE
13 years 9 months ago
2012
IEEE
Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We ...
168
Voted
ISLPED
2010
ACM
15 years 2 months ago
2010
ACM
The unique and unpredictable nature of silicon enables the use of physical unclonable functions (PUFs) for chip identification and authentication. Since the function of PUFs depen...
120
Voted
OSDI
2002
ACM
16 years 2 months ago
2002
ACM
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
89
Voted
GLVLSI
2005
IEEE
15 years 7 months ago
2005
IEEE
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
140
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DAC
2004
ACM
15 years 5 months ago
2004
ACM
In an attempt to enable the cost-effective production of lowand mid-volume application-specific chips, researchers have proposed a number of so-called structured ASIC architecture...