433 search results - page 79 / 87 » Activity-driven clock design for low power circuits |
MICRO
2002
IEEE
15 years 4 months ago
2002
IEEE
Multimedia processing on embedded devices requires an architecture that leads to high performance, low power consumption, reduced design complexity, and small code size. In this p...
101
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VLSISP
2010
14 years 10 months ago
2010
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
91
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DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
105
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ICCAD
2009
IEEE
14 years 9 months ago
2009
IEEE
In a behavioral synthesis system, a typical approach used to guide the scheduler is to impose hard constraints on the relative timing between operations considering performance, a...