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MICRO
2008
IEEE
159views Hardware» more  MICRO 2008»
15 years 3 months ago
A novel cache architecture with enhanced performance and security
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
Zhenghong Wang, Ruby B. Lee
SENSYS
2004
ACM
15 years 2 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...
ISCAS
2005
IEEE
173views Hardware» more  ISCAS 2005»
15 years 3 months ago
CMOS contact imager for monitoring cultured cells
— There is a growing interest in developing low cost, low power, highly integrated biosensor systems to characterize individual cells for applications such as cell analysis, drug...
Honghao Ji, Pamela Abshire, M. Urdaneta, Elisabeth...
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SQJ
2002
106views more  SQJ 2002»
14 years 9 months ago
Energy Metric for Software Systems
Acknowledging the intense requirement for low power operation in most portable computing systems, this paper introduces the notion of energy efficient software design and proposes ...
Alexander Chatzigeorgiou, George Stephanides
GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 2 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...