433 search results - page 83 / 87 » Activity-driven clock design for low power circuits |
IJCSS
2007
14 years 9 months ago
2007
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...
DELTA
2006
IEEE
15 years 3 months ago
2006
IEEE
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
In this paper, we propose an adaptive low-power bus encoding algorithm based on weighted code mapping (WCM) and the delayed bus technique. The WCM algorithm transforms an original...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
CF
2006
ACM
15 years 3 months ago
2006
ACM
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...