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ICS
2009
Tsinghua U.
15 years 4 months ago
High-performance CUDA kernel execution on FPGAs
In this work, we propose a new FPGA design flow that combines the CUDA programming model from Nvidia with the state of the art high-level synthesis tool AutoPilot from AutoESL, to...
Alexandros Papakonstantinou, Karthik Gururaj, John...
SIGCSE
2005
ACM
146views Education» more  SIGCSE 2005»
15 years 3 months ago
Using image processing projects to teach CS1 topics
As Computer Science educators, we know that students learn more from projects that are fun and challenging, that seem “real” to them, and that allow them to be creative in des...
Richard Wicentowski, Tia Newhall
78
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IPPS
2002
IEEE
15 years 2 months ago
Implementing the NAS Benchmark MG in SAC
SAC is a purely functional array processing language designed with numerical applications in mind. It supports generic, high-level program specifications in the style of APL. How...
Clemens Grelck
IPPS
2002
IEEE
15 years 2 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...
SIGSOFT
2009
ACM
15 years 2 months ago
Srijan: a graphical toolkit for sensor network macroprogramming
Macroprogramming is an application development technique for wireless sensor networks (WSNs) where the developer specifies the behavior of the system, as opposed to that of the c...
Animesh Pathak, Mahanth K. Gowda