67 search results - page 4 / 14 » Adaptive Aggregation on Chip Multiprocessors |
IEEEPACT
2008
IEEE
15 years 6 months ago
2008
IEEE
The emergence of power as a first-class design constraint has fueled the proposal of a growing number of run-time power optimizations. Many of these optimizations trade-off power...
112
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HIPEAC
2009
Springer
15 years 3 months ago
2009
Springer
This paper proposes and studies a hardware-based adaptive controlled migration strategy for managing distributed L2 caches in chip multiprocessors. Building on an area-efficient sh...
100
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IEEEPACT
2008
IEEE
15 years 6 months ago
2008
IEEE
Both commercial and scientific workloads benefit from concurrency and exhibit data sharing across threads/processes. The resulting sharing patterns are often fine-grain, with t...
84
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EUROPAR
2008
Springer
15 years 1 months ago
2008
Springer
Recent studies have showed the effectiveness of job co-scheduling in alleviating shared-cache contention on Chip Multiprocessors. Although program inputs affect cache usage and thu...
CIDR
2007
15 years 1 months ago
2007
Prior research shows that database system performance is dominated by off-chip data stalls, resulting in a concerted effort to bring data into on-chip caches. At the same time, hi...