46 search results - page 2 / 10 » Adaptive FPGAs: High-Level Architecture and a Synthesis Meth... |
CORR
2006
Springer
14 years 9 months ago
2006
Springer
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
ICCAD
2000
IEEE
15 years 1 months ago
2000
IEEE
A tool is presented that gives a high-level estimation of the power consumed by an analog continuous-time OTA-C filter when given only high-level input parameters such as dynamic ...
VLSID
2005
IEEE
15 years 9 months ago
2005
IEEE
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
FPGA
2005
ACM
15 years 3 months ago
2005
ACM
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...