33 search results - page 3 / 7 » Adaptive Parallel Graph Mining for CMP Architectures |
PARELEC
2000
IEEE
13 years 10 months ago
2000
IEEE
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
ICS
2010
Tsinghua U.
13 years 8 months ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
HPCC
2007
Springer
14 years 17 days ago
2007
Springer
Clustering of data has numerous applications and has been studied extensively. It is very important in Bioinformatics and data mining. Though many parallel algorithms have been des...
DSN
2007
IEEE
14 years 23 days ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
MICRO
2007
IEEE
14 years 21 days ago
2007
IEEE
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...