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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
15 years 10 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ISPD
2004
ACM
189views Hardware» more  ISPD 2004»
15 years 10 months ago
Almost optimum placement legalization by minimum cost flow and dynamic programming
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
Ulrich Brenner, Anna Pauli, Jens Vygen
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
15 years 10 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
IUI
2004
ACM
15 years 10 months ago
Robust sketched symbol fragmentation using templates
Analysis of sketched digital ink is often aided by the division of stroke points into perceptually-salient fragments based on geometric features. Fragmentation has many applicatio...
Heloise Hwawen Hse, Michael Shilman, A. Richard Ne...
151
Voted
JCDL
2004
ACM
146views Education» more  JCDL 2004»
15 years 10 months ago
Enhancing digital libraries with TechLens+
The number of research papers available is growing at a staggering rate. Researchers need tools to help them find the papers they should read among all the papers published each y...
Roberto Torres, Sean M. McNee, Mara Abel, Joseph A...
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