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ISCA
2010
IEEE
340views Hardware» more  ISCA 2010»
15 years 10 months ago
Necromancer: enhancing system throughput by animating dead cores
Aggressive technology scaling into the nanometer regime has led to a host of reliability challenges in the last several years. Unlike onchip caches, which can be efficiently prot...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
PASTE
2010
ACM
15 years 10 months ago
Learning universal probabilistic models for fault localization
Recently there has been significant interest in employing probabilistic techniques for fault localization. Using dynamic dependence information for multiple passing runs, learnin...
Min Feng, Rajiv Gupta
PASTE
2010
ACM
15 years 10 months ago
Opportunities for concurrent dynamic analysis with explicit inter-core communication
Multicore is now the dominant processor trend, and the number of cores is rapidly increasing. The paradigm shift to multicore forces the redesign of the software stack, which incl...
Jungwoo Ha, Stephen P. Crago
PLDI
2010
ACM
15 years 10 months ago
Mixing type checking and symbolic execution
Static analysis designers must carefully balance precision and efficiency. In our experience, many static analysis tools are built around an elegant, core algorithm, but that alg...
Yit Phang Khoo, Bor-Yuh Evan Chang, Jeffrey S. Fos...
PLDI
2010
ACM
15 years 10 months ago
Line-up: a complete and automatic linearizability checker
Modular development of concurrent applications requires threadsafe components that behave correctly when called concurrently by multiple client threads. This paper focuses on line...
Sebastian Burckhardt, Chris Dern, Madanlal Musuvat...
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