173 search results - page 17 / 35 » Adaptive execution techniques for SMT multiprocessor archite... |
113
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CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
117
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DSN
2007
IEEE
15 years 6 months ago
2007
IEEE
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
101
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TSE
2002
14 years 11 months ago
2002
The complexity of hardware/software codesign of embedded real-time signal processing systems can be reduced by rapid system prototyping (RSP). However, existing RSP frameworks do n...
MAM
2006
14 years 11 months ago
2006
Reconfigurable systems can offer the high spatial parallelism and fine-grained, bit-level resource control traditionally associated with hardware implementations, along with the f...
HPCA
2003
IEEE
16 years 7 days ago
2003
IEEE
Multi-threaded commercial workloads implement many important internet services. Consequently, these workloads are increasingly used to evaluate the performance of uniprocessor and...