62 search results - page 5 / 13 » Adaptive memory programming for matrix bandwidth minimizatio... |
98
Voted
CCGRID
2010
IEEE
14 years 12 months ago
2010
IEEE
Although shared memory programming models show good programmability compared to message passing programming models, their implementation by page-based software distributed shared m...
ICCAD
2006
IEEE
15 years 7 months ago
2006
IEEE
We present a dynamic voltage scaling (DVS) technique that minimizes system-wide energy consumption for both periodic and sporadic tasks. It is known that a system consists of proc...
101
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SIGMETRICS
2011
ACM
14 years 1 months ago
2011
ACM
The workloads in modern Chip-multiprocessors (CMP) are becoming increasingly diversified, creating different resource demands on hardware substrate. It is necessary to allocate h...
93
Voted
EUROPAR
2009
Springer
15 years 2 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
3DIC
2009
IEEE
15 years 5 months ago
2009
IEEE
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...