Sciweavers

233 search results - page 15 / 47
» Address Code Generation for Digital Signal Processors
Sort
View
JCM
2007
95views more  JCM 2007»
14 years 11 months ago
Signal Canceller in the Carrier Super-positioning Satellite Networks
—To establish the interference canceller, generating replicas of unwanted carriers is a key. This paper addresses the design and performances of two types of signal canceller tha...
Mayumi Osato, Hiroyuki Kobashi, Robert Y. Omaki, T...
EMSOFT
2001
Springer
15 years 4 months ago
Compiler Optimizations for Adaptive EPIC Processors
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
Krishna V. Palem, Surendranath Talla, Weng-Fai Won...
CODES
2005
IEEE
15 years 5 months ago
Aggregating processor free time for energy reduction
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...
Aviral Shrivastava, Eugene Earlie, Nikil D. Dutt, ...
DSRT
2008
IEEE
15 years 1 months ago
RTPROC: A System for Rapid Real-Time Prototyping in Audio Signal Processing
In this contribution a new system for the rapid development of real-time prototypes for digital audio signal processing algorithms on Windows PCs and a Digital Signal Processor (D...
Hauke Krüger, Peter Vary
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
15 years 5 months ago
Speeding up SystemC simulation through process splitting
This paper presents a new approach that can be used to speed up SystemC simulations by automatically optimizing the model for simulation. The work addresses the inefficiency of th...
Youssef N. Naguib, Rafik S. Guindi