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» Address Code Generation for Digital Signal Processors
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DSD
2006
IEEE
110views Hardware» more  DSD 2006»
15 years 5 months ago
A Graph Based Algorithm for Data Path Optimization in Custom Processors
The rising complexity, customization and short time to market of modern digital systems requires automatic methods for generation of high performance architectures for such system...
Jelena Trajkovic, Mehrdad Reshadi, Bita Gorjiara, ...
LCTRTS
2007
Springer
15 years 5 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...
CODES
2004
IEEE
15 years 3 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
CGO
2010
IEEE
15 years 6 months ago
Parameterized tiling revisited
Tiling, a key transformation for optimizing programs, has been widely studied in literature. Parameterized tiled code is important for auto-tuning systems since they often execute...
Muthu Manikandan Baskaran, Albert Hartono, Sanket ...
DAC
2001
ACM
16 years 15 days ago
Semi-Formal Test Generation with Genevieve
This paper describes the first application of the Genevieve test generation methodology. The Genevieve approach uses semi-formal techniques derived from "model-checking"...
Julia Dushina, Mike Benjamin, Daniel Geist