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» Address Code Generation for Digital Signal Processors
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ICIP
2000
IEEE
16 years 1 months ago
Performance Analysis of an H.263 Video Encoder for VIRAM
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
Thinh P. Q. Nguyen, Avideh Zakhor, Katherine A. Ye...
DATE
2003
IEEE
106views Hardware» more  DATE 2003»
15 years 4 months ago
Reconfigurable Signal Processing in Wireless Terminals
In this paper, we show the necessity of reconfigurable hardware for data and signal processing in wireless mobile terminals. We first identify the key processing power requirement...
Jürgen Helmschmidt, Eberhard Schüler, Pr...
CW
2004
IEEE
15 years 3 months ago
Barcode Readers using the Camera Device in Mobile Phones
This paper shows new algorithms and the implementations of image reorganization for EAN/QR barcodes in mobile phones. The mobile phone system used here consists of a camera, mobil...
Eisaku Ohbuchi, Hiroshi Hanaizumi, Lim Ah Hock
SIPS
2006
IEEE
15 years 5 months ago
Automated Architectural Exploration for Signal Processing Algorithms
Abstract— This paper presents a design environment for efficiently generating application-specific Intellectual Property (IP) cores for system level signal processing algorithm...
Ramsey Hourani, Ravi Jenkal, W. Rhett Davis, Winse...
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 6 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...