Sciweavers

233 search results - page 25 / 47
» Address Code Generation for Digital Signal Processors
Sort
View
103
Voted
PADL
2005
Springer
15 years 5 months ago
Functional Framework for Sound Synthesis
We present an application of functional programming in the domain of sound generation and processing. We use the lazy language Clean to define purely functional stream generators,...
Jerzy Karczmarczuk
CODES
2005
IEEE
15 years 5 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...
VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
15 years 12 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
DAC
2009
ACM
15 years 4 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
CASES
2008
ACM
15 years 1 months ago
Reducing pressure in bounded DBT code caches
Dynamic binary translators (DBT) have recently attracted much attention for embedded systems. The effective implementation of DBT in these systems is challenging due to tight cons...
José Baiocchi, Bruce R. Childers, Jack W. D...