233 search results - page 31 / 47 » Address Code Generation for Digital Signal Processors |
95
Voted
MICRO
1997
IEEE
15 years 3 months ago
1997
IEEE
Predicated execution is a promising architectural feature for exploiting instruction-level parallelism in the presence of control flow. Compiling for predicated execution involve...
115
Voted
ICCAD
2007
IEEE
15 years 3 months ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
121
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RSP
2000
IEEE
15 years 4 months ago
2000
IEEE
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
120
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DELTA
2006
IEEE
15 years 3 months ago
2006
IEEE
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...
130
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TVLSI
2010
14 years 6 months ago
2010
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...