233 search results - page 8 / 47 » Address Code Generation for Digital Signal Processors |
ICASSP
2008
IEEE
15 years 6 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
109
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TCAD
1998
14 years 11 months ago
1998
We address the problem of code size minimization in VLSI systems with embedded DSP processors. Reducing code size reduces the production cost of embedded systems. We use data comp...
113
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CASES
2005
ACM
15 years 1 months ago
2005
ACM
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
LCTRTS
2005
Springer
15 years 5 months ago
2005
Springer
Efficient implementation of DSP applications is critical for many embedded systems. Optimising C compilers for embedded processors largely focus on code generation and instructio...
FPL
2007
Springer
15 years 5 months ago
2007
Springer
The aim of the hArtes project is to facilitate and automate the rapid design and development of heterogeneous embedded systems, targeting a combination of a general purpose embedd...