821 search results - page 4 / 165 » Addressing the Petersen graph |
ASPDAC
2001
ACM
15 years 1 months ago
2001
ACM
This paper deals with address assignment in code generation for digital signal processors (DSPs) with SIMD (single instruction multiple data) memory accesses. In these processors ...
ISSS
1996
IEEE
15 years 1 months ago
1996
IEEE
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
SIGCOMM
2010
ACM
14 years 9 months ago
2010
ACM
Data center networks encode locality and topology information into their server and switch addresses for performance and routing purposes. For this reason, the traditional address...
ICASSP
2008
IEEE
15 years 3 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
ICCS
2004
Springer
15 years 2 months ago
2004
Springer
Communication latencies have been identified as one of the performance limiting factors of message passing applications in clusters of workstations/multiprocessors. On the receiver...