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ICPP
2008
IEEE
15 years 4 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
LCTRTS
2004
Springer
15 years 3 months ago
Spinach: a liberty-based simulator for programmable network interface architectures
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...
Paul Willmann, Michael Brogioli, Vijay S. Pai
HICSS
2003
IEEE
188views Biometrics» more  HICSS 2003»
15 years 3 months ago
A Collaborative Project Management Architecture
The Project Management (PM) paradigm is rapidly shifting due to business globalization and information technology (IT) advances that support distributed and virtual project teams....
Fang Chen, Nicholas C. Romano Jr., Jay F. Nunamake...
ISCA
2007
IEEE
217views Hardware» more  ISCA 2007»
14 years 10 months ago
Parallel Processing of High-Dimensional Remote Sensing Images Using Cluster Computer Architectures
Hyperspectral sensors represent the most advanced instruments currently available for remote sensing of the Earth. The high spatial and spectral resolution of the images supplied ...
David Valencia, Antonio Plaza, Pablo Martín...
TC
2010
14 years 8 months ago
PERFECTORY: A Fault-Tolerant Directory Memory Architecture
—The number of CPUs in chip multiprocessors is growing at the Moore’s Law rate, due to continued technology advances. However, new technologies pose serious reliability challen...
Hyunjin Lee, Sangyeun Cho, Bruce R. Childers