28 search results - page 2 / 6 » Advanced techniques for RTL debugging |
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
System-on-chip (SoC) designs use bus protocols for high performance data transfer among the Intellectual Property (IP) cores. These protocols incorporate advanced features such as...
112
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ASPDAC
2010
ACM
14 years 7 months ago
2010
ACM
It is increasingly difficult to guarantee the first silicon success for complex integrated circuit (IC) designs. Post-silicon validation has thus become an essential step in the I...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
104
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KBS
2011
14 years 4 months ago
2011
In today’s industrial applications, we see that knowledge systems are successfully implemented. However, critical domains require the elaborate and thoughtful validation of the ...
ICLP
2007
Springer
15 years 3 months ago
2007
Springer
Abstract. We present a framework for the declarative diagnosis of nondeterministic timed concurrent constraint programs. We present a denotational semantics based on a (continuous)...