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DAC
2005
ACM
15 years 10 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
DAC
2006
ACM
15 years 10 months ago
Novel full-chip gridless routing considering double-via insertion
As the technology node advances into the nanometer era, via-open defects are one of the dominant failures. To improve via yield and reliability, redundant-via insertion is a highl...
Huang-Yu Chen, Mei-Fang Chiang, Yao-Wen Chang, Lum...
RECOMB
2004
Springer
15 years 10 months ago
Designing multiple simultaneous seeds for DNA similarity search
The challenge of similarity search in massive DNA sequence databases has inspired major changes in BLAST-style alignment tools, which accelerate search by inspecting only pairs of...
Yanni Sun, Jeremy Buhler
85
Voted
CGO
2010
IEEE
15 years 4 months ago
Automatic creation of tile size selection models
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sa...
ICYCS
2008
IEEE
15 years 4 months ago
FAST CASH: FAir and STable Channel ASsignment on Heterogeneous Wireless Mesh Network
— Nowadays wireless mesh routers are facilitating with more wireless channels than ever because of the advanced wireless communication technologies such as OFDM, SDR and CR(cogni...
Panlong Yang, Guihai Chen