33 search results - page 3 / 7 » Adventures with a Reconfigurable Research Platform |
102
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DATE
2005
IEEE
15 years 3 months ago
2005
IEEE
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
114
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ERSA
2009
14 years 7 months ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
CODES
2002
IEEE
15 years 3 months ago
2002
IEEE
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
ICRA
2007
IEEE
15 years 4 months ago
2007
IEEE
jr.sagepub.com/cgi/content/abstract/27/3-4/331 The online version of this article can be found at: Published by: http://www.sagepublications.com On behalf of: Multimedia Archives c...
DAC
2002
ACM
15 years 11 months ago
2002
ACM
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...