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157
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ISPASS
2008
IEEE
15 years 11 months ago
2008
IEEE
—The potential for improving the performance of data-intensive scientific programs by enhancing data reuse in cache is substantial because CPUs are significantly faster than me...
142
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ISPASS
2008
IEEE
15 years 11 months ago
2008
IEEE
Although the best processor design for executing a specific workload does depend on the characteristics of the workload, it can not be determined without factoring-in the effect o...
144
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ISPASS
2008
IEEE
15 years 11 months ago
2008
IEEE
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
197
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ISPASS
2008
IEEE
2008
IEEE
An Analysis of I/O And Syscalls In Critical Sections And Their Implications For Transactional Memory
15 years 11 months ago
Transactional memory (TM) is a scalable and concurrent way to build atomic sections. One aspect of TM that remains unclear is how side-effecting operations – that is, those whic...
132
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SCAM
2008
IEEE
15 years 11 months ago
2008
IEEE
Decompiling low-level code to a high-level intermediate representation facilitates the development of analyzers, model checkers, etc. which reason about properties of the low-leve...