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89
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ITC
2003
IEEE
120views Hardware» more  ITC 2003»
15 years 3 months ago
Test Vector Generation Based on Correlation Model for Ratio-Iddq
For ratio-Iddq testing, the test performance is significantly affected by the correlation between two currents of different input patterns as process parameters vary. In this p...
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
96
Voted
IJCSA
2007
91views more  IJCSA 2007»
14 years 10 months ago
Experiences in Testing Automation of a Family of Functional- and GUI-similar Programs
This article presents experiences in the automation of a testing process. The main goal is the unified testing of not only one program, but a whole family of programs. The family ...
Anna Derezinska, Tomasz Malek
65
Voted
IAJIT
2010
84views more  IAJIT 2010»
14 years 8 months ago
A Test Procedure for Boundary Scan Circuitry in PLDs and FPGAs
: A test procedure for testing mainly the boundary scan cells, and testing partially the test access port controller in programmable logic devices, and field programmable gate arra...
Bashar Al-Khalifa
77
Voted
TIT
2011
157views more  TIT 2011»
14 years 5 months ago
Decentralized Sequential Hypothesis Testing Using Asynchronous Communication
—An asymptotically optimum test for the problem of decentralized sequential hypothesis testing is presented. The induced communication between sensors and fusion center is asynch...
Georgios Fellouris, George V. Moustakides
93
Voted
GECCO
2010
Springer
196views Optimization» more  GECCO 2010»
15 years 3 months ago
Using synthetic test suites to empirically compare search-based and greedy prioritizers
The increase in the complexity of modern software has led to the commensurate growth in the size and execution time of the test suites for these programs. In order to address this...
Zachary D. Williams, Gregory M. Kapfhammer