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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 10 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
PLDI
1996
ACM
15 years 6 months ago
Realistic Compilation by Partial Evaluation
Two key steps in the compilation of strict functional languages are the conversion of higher-order functions to data structures (closures) and the transformation to tail-recursive...
Michael Sperber, Peter Thiemann
TVCG
2011
136views more  TVCG 2011»
14 years 8 months ago
Interactive Mesh Cutting Using Constrained Random Walks
—This paper considers the problem of interactively finding the cutting contour to extract components from an existing mesh. First, we propose a constrained random walks algorith...
Juyong Zhang, Jianmin Zheng, Jianfei Cai
BMCBI
2010
132views more  BMCBI 2010»
15 years 2 months ago
Error margin analysis for feature gene extraction
Background: Feature gene extraction is a fundamental issue in microarray-based biomarker discovery. It is normally treated as an optimization problem of finding the best predictiv...
Chi Kin Chow, Hai Long Zhu, Jessica Lacy, Winston ...
CVIU
2007
154views more  CVIU 2007»
15 years 1 months ago
Smart particle filtering for high-dimensional tracking
Tracking articulated structures like a hand or body within a reasonable time is challenging because of the high dimensionality of the state space. Recently, a new optimization met...
Matthieu Bray, Esther Koller-Meier, Luc J. Van Goo...