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IPPS
2000
IEEE
15 years 11 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
FTDCS
1999
IEEE
15 years 11 months ago
Priority Scheduling and Buffer Management for ATM Traffic Shaping
The impact of buffer management and priority scheduling is examined in stressful scenarios when the aggregate incoming traffic is higher than the output link capacity of an Asynch...
Todd Lizambri, Fernando Duran, Shukri Wakid
IPPS
1997
IEEE
15 years 11 months ago
Cyclic Networks: A Family of Versatile Fixed-Degree Interconnection Architectures
In this paper, we propose a new family of interconnection networks, called cyclic networks (CNs), in which an intercluster connection is defined on a set of nodes whose addresses...
Chi-Hsiang Yeh, Behrooz Parhami
IPPS
1996
IEEE
15 years 11 months ago
Software Techniques for Improving MPP Bulk-Transfer Performance
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...
Eric A. Brewer, Paul Gauthier, Armando Fox, Angela...
PDIS
1996
IEEE
15 years 11 months ago
Scrambling Query Plans to Cope With Unexpected Delays
Accessing data from numerous widely-distributed sources poses signi cant new challenges for query optimization and execution. Congestion and failures in the network can introduce ...
Laurent Amsaleg, Michael J. Franklin, Anthony Toma...