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190
Voted
DAC
2009
ACM
16 years 7 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
DAC
2007
ACM
16 years 7 months ago
GlitchMap: An FPGA Technology Mapper for Low Power Considering Glitches
In 90-nm technology, dynamic power is still the largest power source in FPGAs [1], and signal glitches contribute a large portion of the dynamic power consumption. Previous powera...
Lei Cheng, Deming Chen, Martin D. F. Wong
201
Voted
SIGGRAPH
1995
ACM
15 years 10 months ago
A signal processing approach to fair surface design
In this paper we describe a new tool for interactive free-form fair surface design. By generalizing classical discrete Fourier analysis to two-dimensional discrete surface signals...
Gabriel Taubin
180
Voted
RAID
2009
Springer
16 years 1 months ago
Regular Expression Matching on Graphics Hardware for Intrusion Detection
The expressive power of regular expressions has been often exploited in network intrusion detection systems, virus scanners, and spam filtering applications. However, the flexibl...
Giorgos Vasiliadis, Michalis Polychronakis, Spyros...
ISORC
2008
IEEE
16 years 1 months ago
CROWN: A Service-Oriented Grid Middleware System: Experience and Applications
Grid computing has emerged as a new paradigm of distributed computing technology on large-scale resource sharing and coordinated problem solving. Based on a proposed Web service-b...
Jinpeng Huai, Chunming Hu, Tianyu Wo, Jianxin Li