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IUI
2004
ACM
15 years 12 months ago
Evaluation of visual balance for automated layout
Layout refers to the process of determining the size and position of the visual objects in an information presentation. We introduce the WeightMap, a bitmap representation of the ...
Simon Lok, Steven Feiner, Gary Ngai
IMR
2004
Springer
15 years 12 months ago
Intuitive, Interactive, and Robust Modification and Optimization of Finite Element Models
Virtual prototyping and numerical simulations are increasingly replacing real mock-ups and experiments in industrial product development. Many of these simulations, e.g. for the p...
Katrin Bidmon, Dirc Rose, Thomas Ertl
DAC
2003
ACM
15 years 11 months ago
Fast timing-driven partitioning-based placement for island style FPGAs
In this paper we propose a partitioning-based placement algorithm for FPGAs. The method incorporates simple, but effective heuristics that target delay minimization. The placement...
Pongstorn Maidee, Cristinel Ababei, Kia Bazargan
DAC
1995
ACM
15 years 10 months ago
On the Bounded-Skew Clock and Steiner Routing Problems
We study the minimum-costbounded-skewrouting tree (BST) problem under the linear delay model. This problem captures several engineering tradeoffs in the design of routing topologi...
Dennis J.-H. Huang, Andrew B. Kahng, Chung-Wen Alb...
CODES
2007
IEEE
15 years 8 months ago
Incremental run-time application mapping for homogeneous NoCs with multiple voltage levels
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a re...
Chen-Ling Chou, Radu Marculescu