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ASAP
2000
IEEE
125views Hardware» more  ASAP 2000»
15 years 7 months ago
High Level Modeling for Parallel Executions of Nested Loop Algorithms
High level modeling and (quantitative) performance analysis of signal processing systems requires high level models for the applications(algorithms) and the implementations (archi...
Ed F. Deprettere, Edwin Rijpkema, Paul Lieverse, B...
KES
1998
Springer
15 years 7 months ago
On the effect of multi-parents recombination in binary coded genetic algorithms
Abstract--Recombination operator plays a very important role in genetic algorithms. In this paper, we present binary coded genetic algorithms in which more than two parents are inv...
Shigeyoshi Tsutsui, Lakhmi C. Jain
ECML
2006
Springer
15 years 7 months ago
EM Algorithm for Symmetric Causal Independence Models
Causal independence modelling is a well-known method both for reducing the size of probability tables and for explaining the underlying mechanisms in Bayesian networks. In this pap...
Rasa Jurgelenaite, Tom Heskes
CODES
2001
IEEE
15 years 7 months ago
RS-FDRA: a register sensitive software pipelining algorithm for embedded VLIW processors
The paper proposes a novel software-pipelining algorithm, Register Sensitive Force Directed Retiming Algorithm (RSFDRA), suitable for optimizing compilers targeting embedded VLIW ...
Cagdas Akturan, Margarida F. Jacome
112
Voted
SPIN
2000
Springer
15 years 7 months ago
Modeling the ASCB-D Synchronization Algorithm with SPIN: A Case Study
In this paper, we describe our application of SPIN 1 to model an algorithm used to synchronize the clocks of modules that provide periodic real-time communication over a network. W...
Nicholas Weininger, Darren D. Cofer