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» Algorithm Transformation for FPGA Implementation
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ISCAS
2005
IEEE
147views Hardware» more  ISCAS 2005»
15 years 7 months ago
A heuristic approach for multiple restricted multiplication
— This paper introduces a heuristic solution to the multiple restricted multiplication (MRM) optimization problem. MRM refers to a situation where a single variable is multiplied...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
ASAP
2003
IEEE
153views Hardware» more  ASAP 2003»
15 years 7 months ago
Hardware Synthesis for Multi-Dimensional Time
This paper introduces basic principles for extending the classical systolic synthesis methodology to multi-dimensional time. Multi-dimensional scheduling enables complex algorithm...
Anne-Claire Guillou, Patrice Quinton, Tanguy Risse...
IPPS
2003
IEEE
15 years 7 months ago
Fast Online Task Placement on FPGAs: Free Space Partitioning and 2D-Hashing
Partial reconfiguration allows for mapping and executing several tasks on an FPGA during runtime. Multitasking on FPGAs raises a number of questions on the management of the reco...
Herbert Walder, Christoph Steiger, Marco Platzner
ISCAS
2003
IEEE
118views Hardware» more  ISCAS 2003»
15 years 7 months ago
Embedded reconfigurable array targeting motion estimation applications
Motion estimation is a complex computation found in video compression algorithms, such as standards like MPEG-4 and H.263. This paper proposes an embedded reconfigurable array for...
Sami Khawam, Tughrul Arslan, Fred Westall
FPL
2001
Springer
107views Hardware» more  FPL 2001»
15 years 6 months ago
Gambit: A Tool for the Simultaneous Placement and Detailed Routing of Gate-Arrays
In this paper we present a new method of integrating the placement and routing stages in the physical design of channel-based architectures, and present the first implementation o...
John Karro, James P. Cohoon