1108 search results - page 109 / 222 » Algorithm Transformation for FPGA Implementation |
160
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ENC
2004
IEEE
15 years 6 months ago
2004
IEEE
We present a hardware architecture for an Elliptic Curve Cryptography System performing the three basic cryptographic schemes: DH key generation, encryption and digital signature....
102
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FPL
2000
Springer
15 years 5 months ago
2000
Springer
This paper describes a novel resource binding technique for use in multiple-wordlength systems implemented in FPGAs. It is demonstrated that the multiple-wordlength binding problem...
112
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ARC
2008
Springer
15 years 4 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
TVLSI
2008
15 years 2 months ago
2008
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...
158
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ERSA
2009
15 years 1 days ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...