1108 search results - page 112 / 222 » Algorithm Transformation for FPGA Implementation |
113
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ASPDAC
2005
ACM
15 years 4 months ago
2005
ACM
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
191
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OSN
2011
14 years 5 months ago
2011
—This paper presents PI-OPS (Parallel-Iterative Optical Packet Scheduler) a parallel-iterative scheduler for asynchronous Optical Packet Switching nodes with optical buffering. O...
GECCO
2003
Springer
15 years 7 months ago
2003
Springer
A novel method, for solving satisfiability (SAT) instances is presented. It is based on two components: a) An Epistasis Reducer Algorithm (ERA) that produces a more suited represe...
119
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DAGSTUHL
2000
15 years 3 months ago
2000
The emerging discipline of algorithm engineering has primarily focussed on transforming pencil-and-paper sequential algorithms into robust, efficient, well tested, and easily used ...
97
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WDAG
2009
Springer
15 years 8 months ago
2009
Springer
A contention-sensitive data structure is a concurrent data structure in which the overhead introduced by locking is eliminated in the common cases, when there is no contention, or ...