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» Algorithm Transformation for FPGA Implementation
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ANCS
2005
ACM
15 years 7 months ago
High-throughput linked-pattern matching for intrusion detection systems
This paper presents a hardware architecture for highly efficient intrusion detection systems. In addition, a software tool for automatically generating the hardware is presented....
Zachary K. Baker, Viktor K. Prasanna
SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
15 years 7 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
FPL
2005
Springer
119views Hardware» more  FPL 2005»
15 years 7 months ago
Real-Time Feature Extraction for High Speed Networks
With the onset of Gigabit networks, current generation networking components will soon be insufficient for numerous reasons: most notably because existing methods cannot support h...
David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Al...
ASPDAC
2000
ACM
104views Hardware» more  ASPDAC 2000»
15 years 6 months ago
Design of digital neural cell scheduler for intelligent IB-ATM switch
— We present the architecture of the ATM banyan switch composed of pattern process and high-speed digital neural cell scheduler. An input buffer type ATM switch with a window-bas...
J.-K. Lee, Seung-Min Lee, Mike Myung-Ok Lee, D.-W....
ASAP
2004
IEEE
127views Hardware» more  ASAP 2004»
15 years 5 months ago
A Public-Key Cryptographic Processor for RSA and ECC
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
Hans Eberle, Nils Gura, Sheueling Chang Shantz, Vi...