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» Algorithm Transformation for FPGA Implementation
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CCECE
2006
IEEE
15 years 3 months ago
Hardware Edge Detection using an Altera Stratix NIOS2 Development Kit
— Edge detection is a computer vision algorithm that is very processor intensive. It is possible to increase the speed of the algorithm by using hardware parallelism. This paper ...
Jay Kraut
85
Voted
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
15 years 1 months ago
A crosstalk-aware timing-driven router for FPGAs
As integrated circuits are migrated to more advanced technologies, it has become clear that crosstalk is an important physical phenomenon that must be taken into account. Crosstal...
Steven J. E. Wilton
120
Voted
ERSA
2010
217views Hardware» more  ERSA 2010»
14 years 7 months ago
FPGA for Computing the Pixel Purity Index Algorithm on Hyperspectral Images
The pixel purity index algorithm is employed in remote sensing for analyzing hyperspectral images. A single pixel usually covers several different materials, and its observed spect...
Carlos González, Daniel Mozos, Javier Resan...
84
Voted
FPGA
1999
ACM
115views FPGA» more  FPGA 1999»
15 years 1 months ago
Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
Alexander Marquardt, Vaughn Betz, Jonathan Rose
FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 3 months ago
Using DSP Blocks For ROM Replacement: A Novel Synthesis Flow
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...
Gareth W. Morris, George A. Constantinides, Peter ...