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» Algorithm Transformation for FPGA Implementation
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ISCAS
2005
IEEE
103views Hardware» more  ISCAS 2005»
15 years 3 months ago
Hardware realization of panoramic camera with speaker-oriented face extraction for teleconferencing
— In this paper, a panoramic camera with speaker oriented face extraction function is proposed. For the face extraction, the Genetic Algorithm(GA) is implemented in a Field Prgra...
Yukinori Nagase, Takahiko Yamamoto, Takao Kawamura...

Publication
266views
14 years 2 months ago
NeuFlow: A Runtime Reconfigurable Dataflow Processor for Vision
In this paper we present a scalable dataflow hard- ware architecture optimized for the computation of general- purpose vision algorithms—neuFlow—and a dataflow compiler—luaFl...
C. Farabet, B. Martini, B. Corda, P. Akselrod, E. ...
ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
15 years 4 months ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
FPL
2009
Springer
148views Hardware» more  FPL 2009»
15 years 2 months ago
Comparing fine-grained performance on the Ambric MPPA against an FPGA
A simple image-processing application is implemented on the Ambric MPPA and an FPGA, using a similar implementation for both devices. FPGAs perform extremely well on this kind of ...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
DAC
1995
ACM
15 years 1 months ago
A Method for Finding Good Ashenhurst Decompositions and Its Application to FPGA Synthesis
—In this paper, we present an algorithm for finding a good Ashenhurst decomposition of a switching function. Most current methods for performing this type of decomposition are ba...
Ted Stanion, Carl Sechen