1108 search results - page 34 / 222 » Algorithm Transformation for FPGA Implementation |
112
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GLVLSI
2005
IEEE
15 years 7 months ago
2005
IEEE
This paper addresses a pipelined partial rolling (PPR) architecture for the AES encryption. The key technique is the PPR architecture, which is suitable for FPGA implementation. U...
107
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FPL
2004
Springer
15 years 7 months ago
2004
Springer
Abstract: We show how an application of central importance to computational biochemistry can be implemented efficiently on an FPGA. This requires reformulating the algorithm and ta...
108
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FPGA
1999
ACM
15 years 6 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
131
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FPGA
1998
ACM
15 years 6 months ago
1998
ACM
It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
185
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DELTA
2010
IEEE
15 years 6 months ago
2010
IEEE
: Most of published audio watermark algorithms are suffered a trade-off between inaudibility and detectibility, and the detection performance depends greatly on the strength of noi...