Sciweavers

1108 search results - page 39 / 222
» Algorithm Transformation for FPGA Implementation
Sort
View
INTEGRATION
2007
98views more  INTEGRATION 2007»
15 years 1 months ago
Hashchip: A shared-resource multi-hash function processor architecture on FPGA
The ubiquitous presence of mobile devices and the demand for better performance and efficiency have motivated research into embedded implementations of cryptography algorithms. I...
T. S. Ganesh, Michael T. Frederick, T. S. B. Sudar...
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 5 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...
CAIP
1999
Springer
145views Image Analysis» more  CAIP 1999»
15 years 6 months ago
Optimized Fast Algorithms for the Quaternionic Fourier Transform
Abstract. In this article, we deal with fast algorithms for the quaternionic Fourier transform (QFT). Our aim is to give a guideline for choosing algorithms in practical cases. Hen...
Michael Felsberg, Gerald Sommer
DAC
2005
ACM
16 years 2 months ago
Architecture-adaptive range limit windowing for simulated annealing FPGA placement
Previous research has shown both theoretically and practically that simulated annealing can greatly benefit from the incorporation of an adaptive range limiting window to control ...
Kenneth Eguro, Scott Hauck, Akshay Sharma
FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
15 years 1 months ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel