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» Algorithm Transformation for FPGA Implementation
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JRTIP
2007
108views more  JRTIP 2007»
14 years 9 months ago
Real-time hardware acceleration of the trace transform
The trace transform is a novel algorithm that has been shown to be effective in a number of image recognition tasks. It is a generalisation of the Radon transform that has been wid...
Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y...
ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
15 years 4 months ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...
135
Voted
FPGA
2006
ACM
224views FPGA» more  FPGA 2006»
15 years 1 months ago
Flexible implementation of genetic algorithms on FPGAs
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
Tatsuhiro Tachibana, Yoshihiro Murata, Naoki Shiba...
69
Voted
SAMOS
2007
Springer
15 years 3 months ago
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder
Client-side diversification led the video-coding community to develop scalable video-codecs supporting efficient decoding at varying quality levels. This scalability has a lot of...
Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mar...
LATINCRYPT
2010
14 years 7 months ago
Accelerating Lattice Reduction with FPGAs
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...
Jérémie Detrey, Guillaume Hanrot, Xa...