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» Algorithm Transformation for FPGA Implementation
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FPL
2008
Springer
207views Hardware» more  FPL 2008»
15 years 3 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana
PLDI
2003
ACM
15 years 7 months ago
The design, implementation, and evaluation of a compiler algorithm for CPU energy reduction
This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm ...
Chung-Hsing Hsu, Ulrich Kremer
IPPS
2006
IEEE
15 years 7 months ago
Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search
In this work we present a system for implementing the placement and routing stages in the FPGA cycle of design, into the physical design stage. We start with the ISCAS benchmarks,...
Manuel Rubio del Solar, Juan Manuel Sánchez...
CVPR
1998
IEEE
16 years 3 months ago
Real-Time 2-D Feature Detection on a Reconfigurable Computer
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
Arrigo Benedetti, Pietro Perona
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
15 years 10 months ago
Application-specific customization of parameterized FPGA soft-core processors
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
David Sheldon, Rakesh Kumar, Roman L. Lysecky, Fra...