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» Algorithm Transformation for FPGA Implementation
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DATE
2010
IEEE
144views Hardware» more  DATE 2010»
15 years 2 months ago
A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
Abdulkadir Akin, G. Sayilar, Ilker Hamzaoglu
ICASSP
2011
IEEE
14 years 1 months ago
FPGA implementation made easy for applied digital signal processing courses
Applied digital signal processing courses offered at many universities do not normally include FPGA implementation of signal processing algorithms. This is due to the fact that st...
Nasser D. Kehtarnavaz, Sidharth Mahotra
FPL
2003
Springer
146views Hardware» more  FPL 2003»
15 years 2 months ago
Domain-Specific Reconfigurable Array for Distributed Arithmetic
Distributed Arithmetic techniques are widely used to implement Sum-of-Products computations such as calculations found in multimedia applications like FIR filtering and Discrete Co...
Sami Khawam, Tughrul Arslan, Fred Westall
ASAP
2006
IEEE
150views Hardware» more  ASAP 2006»
14 years 11 months ago
Architecture design of an H.264/AVC decoder for real-time FPGA implementation
This paper discusses hardware development of a realtime H.264/AVC video decoder. Synthesis results are presented for example implementations of the inverse quantization, inverse t...
Thomas Warsaw, Marcin Lukowiak
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
15 years 1 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar