This paper shows for the first time that elimination, a scaling technique formerly applied only to counters and LIFO structures, can be applied to FIFO data structures, specific...
Mark Moir, Daniel Nussbaum, Ori Shalev, Nir Shavit
Machine-learning algorithms are employed in a wide variety of applications to extract useful information from data sets, and many are known to suffer from superlinear increases in ...
Karthik Nagarajan, Brian Holland, Alan D. George, ...
To increase the flexibility of single-chip evolvable hardware systems, we explore possibilities of systems with the evolutionary algorithm implemented in software on an onchip pr...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga, Yo...
—This paper presents the field-programmable gate array (FPGA) implementation of a variant of the LenstraLenstra-Lov´asz (LLL) lattice reduction (LR) algorithm, known as the Cla...
Luis G. Barbero, David L. Milliner, Tharmalingam R...
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...