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» Algorithm Transformation for FPGA Implementation
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110
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ASPDAC
2001
ACM
81views Hardware» more  ASPDAC 2001»
15 years 5 months ago
High-level specification and efficient implementation of pipelined circuits
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Maria-Cristina V. Marinescu, Martin C. Rinard
145
Voted
CCGRID
2011
IEEE
14 years 5 months ago
Small Discrete Fourier Transforms on GPUs
– Efficient implementations of the Discrete Fourier Transform (DFT) for GPUs provide good performance with large data sizes, but are not competitive with CPU code for small data ...
S. Mitra, A. Srinivasan
127
Voted
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
15 years 5 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
ICMCS
2008
IEEE
208views Multimedia» more  ICMCS 2008»
15 years 8 months ago
Fast computation of general Fourier Transforms on GPUS
We present an implementation of general FFTs for graphics processing units (GPUs). Unlike most existing GPU FFT implementations, we handle both complex and real data of any size t...
Brandon Lloyd, Chas Boyd, Naga K. Govindaraju
ICCAD
2003
IEEE
219views Hardware» more  ICCAD 2003»
15 years 10 months ago
A Min-Cost Flow Based Detailed Router for FPGAs
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
Seokjin Lee, Yongseok Cheon, Martin D. F. Wong