Sciweavers

234 search results - page 15 / 47
» Algorithmic Power from Declarative Use of Redundant Constrai...
Sort
View
110
Voted
ICASSP
2011
IEEE
14 years 4 months ago
Power allocation optimization in OFDM-based cognitive radios based on sensing information
Owing to the non-zero probability of the missed detection and false alarm of active primary transmission, a certain degree of performance degradation of the primary user (PU) from...
Xiaoge Huang, Baltasar Beferull-Lozano
VLSID
2002
IEEE
131views VLSI» more  VLSID 2002»
16 years 24 days ago
Divide-and-Conquer IDDQ Testing for Core-Based System Chips
IDDQ testing has been used as a test technique to supplement voltage testing of CMOS chips. The idea behind IDDQ testing is to declare a chip as faulty if the steady-state current...
C. P. Ravikumar, Rahul Kumar
FPGA
2008
ACM
151views FPGA» more  FPGA 2008»
15 years 1 months ago
Beyond the arithmetic constraint: depth-optimal mapping of logic chains in LUT-based FPGAs
Look-up table based FPGAs have migrated from a niche technology for design prototyping to a valuable end-product component and, in some cases, a replacement for general purpose pr...
Michael T. Frederick, Arun K. Somani
123
Voted
BMCBI
2007
143views more  BMCBI 2007»
15 years 16 days ago
Gene selection for classification of microarray data based on the Bayes error
Background: With DNA microarray data, selecting a compact subset of discriminative genes from thousands of genes is a critical step for accurate classification of phenotypes for, ...
Ji-Gang Zhang, Hong-Wen Deng
128
Voted
AAAI
2006
15 years 1 months ago
Temporal Preference Optimization as Weighted Constraint Satisfaction
We present a new efficient algorithm for obtaining utilitarian optimal solutions to Disjunctive Temporal Problems with Preferences (DTPPs). The previous state-of-the-art system ac...
Michael D. Moffitt, Martha E. Pollack