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ICCD
2004
IEEE
111views Hardware» more  ICCD 2004»
16 years 3 months ago
Power-Aware Deterministic Block Allocation for Low-Power Way-Selective Cache Structure
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
Jung-Wook Park, Gi-Ho Park, Sung-Bae Park, Shin-Du...
ICCD
2002
IEEE
140views Hardware» more  ICCD 2002»
16 years 3 months ago
Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model
— In this paper, we present a new interconnect delay model called Fitted Elmore delay (FED). FED is generated by approximating Hspice delay data using a curve fitting technique....
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Ch...
ICCD
2001
IEEE
154views Hardware» more  ICCD 2001»
16 years 3 months ago
Performance Optimization By Wire and Buffer Sizing Under The Transmission Line Model
As the operating frequency increases to Giga Hertz and the rise time of a signal is less than or comparable to the time-of-flight delay of a line, it is necessary to consider the...
Tai-Chen Chen, Song-Ra Pan, Yao-Wen Chang
ICCAD
2008
IEEE
98views Hardware» more  ICCAD 2008»
16 years 3 months ago
Statistical path selection for at-speed test
Abstract— Process variations make at-speed testing significantly more difficult. They cause subtle delay changes that are distributed rather than the localized nature of a trad...
Vladimir Zolotov, Jinjun Xiong, Hanif Fatemi, Chan...
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
16 years 3 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku
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